What is "verilog-to-routing"

Verilog-to-Routing (VTR) is an open source CAD flow for FPGA devices. VTR's main purpose is to map a given circuit described in Verilog, a Hardware Description Language, on a given FPGA architecture for research and development purposes. The VTR project is a collaboration between the University of New Brunswick, the University of California, Berkeley and the University of Toronto. Additional contributors include Altera and Texas Instruments.