What is "myhdl"

MyHDL is a Python based hardware description language (HDL).

Features of MyHDL include:

• The ability to generate VHDL and Verilog code from a MyHDL design.
• The ability to generate a testbench (Conversion of test benches) with test vectors in VHDL or Verilog, based on complex computations in Python.
• The ability to convert a lists of signals.
• The ability to convert output verification.
• The ability to do Co-simulation with Verilog.
• An advanced datatype system, independent of traditional datatypes. MyHDL's translator tool automatically writes conversion functions when the target language requires them.

MyHDL is developed by Jan Decaluwe.